View AD834AR-REEL_7607771.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

500 mhz four - quadrant multiplier data sheet ad834 rev. f informatio n furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications s ubject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. features dc to >500 mhz o peration different ial 1 v f ull - scale i nputs differential 4 ma f ull - s cale o utput c urrent low d istortion ( 0 .05% for 0 dbm i nput) supply v oltages from 4 v to 9 v low p ower (280 mw t ypical at v s = 5 v ) applications high s peed r ea l t ime c omputation wideband m odulation and g ain c ontrol signal c orrelation and rf p ower m easurement voltage c ontrolled f ilters and o scillators linear k eyers for h igh r esolution t elevision wideband t rue rms functional block dia gram 00894-001 ad834 current amplifier (w) 4m a fs x1 x2 y2 y1 w1 v t o i v t o i 8.5m a 8.5m a w2 dis t ortion cancell a tion dis t ortion cancell a tion 7 8 2 5 4 1 figure 1 . general description the ad834 is a monolithic, laser - trimmed four - quadrant analog multiplier intended for use in high frequency applications, with a transconductance bandwidth (r l = 50 ) in excess of 500 mhz from either of the differential voltage inputs. in multiplier modes, the typical total f ull - scale error is 0.5%, dependent on the application mode and the external circuitry. performance is relatively insensitive to temperature and supply variations due to the use of stable biasing based on a band gap reference generator and other design features. to preserve the full bandwidth potential of the high speed bipo lar process used to fabricate the ad834, the outputs appear as a different ial pair of currents at open collectors. to provide a single - ended ground referenced voltage output, some form of external current - to - voltage conversion is needed. this may take the form of a wideband transformer, balun, or active circuitry such as an op a mp. in some applications (such as power measure - ment), the subsequent signal processing may not need to have high bandwidth. the transfer function is accurately trimmed such that when x = y = 1 v, the differential output is 4 ma. this absolute calibrati on allows the outputs of two or more ad834 devices to be summed with precisely equal weighting, independent of the accuracy of the load circuit. the ad834j , available in 8 - lead pdip and plastic soic packages, is specified over the commercial tempera ture r ange of 0c to 70c . the ad834a is also available in 8 - lead cerdip and plastic soic package s operati ng over the industrial temperature range of ?40c to +85c. the ad834s q /883b , available in an 8 - lead c e r d i p, ope rat es over the military temperature range of ?55c to +125c. s - grade chips are also available. two application notes featuring the ad834 (an - 212 and an - 216) can be found at www.analog.com . for additional applications circuits , consult the ad811 data she et. product highlights 1. c ombines high static accuracy (low input and output offsets an d accurate scale factor) with very high bandwidth. as a four - quadrant multiplier or squarer, the response extends from dc to an upper frequency limited by packaging a nd ex ternal board layout considerations. obtains a large signal bandwidth of > 500 mhz under optimum conditions. 2. u sed in many high speed nonlinear operations, such as square rooting, analog division, vector addition, and rms - to - dc conversion. in these modes, the bandwidth is limited by the external active components. 3. special design techniques result in low distortion levels (better than ?60 db on either input) at high frequencies and low signal feedthrough (typically ?65 db up to 20 mhz). 4. e xhibits low differentia l phase error over the input range typically 0.08 at 5 mhz and 0.8 at 50 mhz. the large signal transient response is free from overshoot and has an intrinsic rise time of 500 ps, typically settling to within 1% in under 5 ns. 5. the nonloading, high impedan ce, differential inputs simplify the application of the ad834.
ad834 data sheet rev. f | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 product highlights ....................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 thermal characteristics .............................................................. 5 chip dimensions and bonding diagram ................................. 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical performance characteristics ............................................. 7 test circuits ........................................................................................8 explanation of typical performance characteristics and test circuits ......................................................................................... 10 theory of operation ...................................................................... 11 transfer function ....................................................................... 11 biasing the output ..................................................................... 12 transformer coupling ............................................................... 12 wideband multiplier connections .......................................... 13 power measurement (mean - square and rms) ......................... 14 frequency doubler .................................................................... 16 wideband three - signal multiplier/divider ........................... 16 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 19 revision history 6/12 rev. e to rev. f changes to figure 1 .......................................................................... 1 change to bias current parameter, table 1 .................................. 3 changes to table 4 ............................................................................ 6 changes to ordering guide .......................................................... 19 5/0 9 rev . d to rev e updated format .................................................................. universal deleted temperature range and package options parameters, table 1 ................................................................................................ 4 added pin configuration and function descriptions section ................................................................................................ 6 added figure 10, renumbered figures sequentially .................. 9 added explanation of typical performanc e characteristics and test circuits section ....................................................................... 10 changes to the theory of operation section ............................. 11 added figure 13 and figure 14 .................................................... 12 c hanges to wideband multiplier connections .......................... 13 changes to figure 18 ...................................................................... 13 changes to figure 20 ...................................................................... 15 changes to figure 2 1 ...................................................................... 16 updated outl ine dimensions ....................................................... 17 changes to ordering guide .......................................................... 18 4/02 rev. c to rev. d edits to ordering guide model nomenclature corrected .......... 3
data sheet ad834 rev. f | page 3 of 20 specifications t a = 25c and v s = 5 v, unless otherwise noted; dbm assumes 50 load. specifications in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality levels. table 1. parameters conditions min typ max unit multiplier performance transfer function ( ) ma v 4 1 = total error 1 ?1 v x, y < +1 v 0.5 2 % fs vs. temperature (ad834a/ad834s only) t min to t max 1.5 3 % fs vs. supplies (all models) 2 4 v to 6 v 0.1 0.3 % fs/v linearity 3 0.5 1 % fs bandwidth 4 500 mhz feedthrough, x x = 1 v, y = nulled 0.2 0.3 % fs feedthrough, y x = nulled, y = 1 v 0.1 0.2 % fs ac feedthrough, x 5 x = 0 dbm, y = nulled f = 10 mhz C65 db f = 100 mhz C50 db ac feedthro ugh, y 5 x = nulled, y = 0 dbm f = 10 mhz C70 db f = 100 mhz C50 db inputs (x1, x2, y1, y2) full - scale range differential 1 v clipping level differential 1.1 1.3 v input resistance differential 25 k offset voltage 0.5 3 mv vs. temperature t min to t max 10 v/c 4 mv vs. supplies 2 4 v to 6 v 100 300 v/v bias current 45 a common - mode rej ection f 100 khz; 1 v p - p 70 db nonlinearity, x y = 1 v; x = 1 v 0.2 0.5 % fs nonlinearity, y x = 1 v; y = 1 v 0.1 0.3 % fs distortion, x x = 0 dbm, y = 1 v f = 10 mhz ?60 db f = 100 mhz ? 44 db distortion, y x = 1 v, y = 0 dbm f = 10 mhz C65 db f = 100 mhz C50 db outputs (w1, w2) zero signal current each output 8.5 ma differential offset x = 0, y = 0 20 60 a vs. temperature nac all models t min to t max 40 ad834a/ad83 4s only 60 a scaling current differential 3.96 4 4.04 ma output compliance 4.75 9 v noise spectral density f = 10 hz to 1 mhz 16 nv/hz outputs into 50 load
ad834 data sheet rev. f | page 4 of 20 parameters conditions min typ max unit power supplies operating range 4 9 v quiescent curre nt 6 t min to t max +v s 11 14 ma Cv s 28 35 ma 1 error is defined as the maximum deviation from the ideal output, a nd expressed as a percentage of the full - scale out put. see figure 16 . 2 both supplies taken simultaneously; sinusoidal input at f 10 khz. 3 linearity is defined as residual error after compensating for input offse t voltage, output offset current, and scaling current errors. 4 bandwidth is guaranteed when configured in squarer mode. see figure 12. 5 sine input; relative to full - scale output; zero input port nulled; represents feedthrough of the fundamental. 6 negative supply current is equal to the sum of positive supply current, the signal currents into each output, w1 and w2, and the input bias currents.
data sheet ad834 rev. f | page 5 of 20 absolute maximum rat ings table 2. parameter ratings supply voltage (+v s to ?v s ) 18 v internal power dissipation 500 mw input voltages (x1, x2, y1, y2) +v s operating temperature range s commercial, ad834j only 0c to 70c industrial, ad834a only ?40c to +85c military ad834s/883b only ?55c to +125c storage temperature range (q) ?65c to +150c storage temperature range (r, n) ?65c to +125c lead temperature (soldering , 60 sec) 300c esd rating 500 v stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characterist ics table 3. package ja ja unit 8- lead cerdip (q) 110 110 c/w 8- lead soic (r) 165 165 c/w 8- lead p dip (n) 99 99 c/w chip dimensions a nd bonding diagram 00894-003 adi 1987 us a a834 pmd y1 y2 w2 notes 1. dimensions shown in inches and (mm). contact factory for latest dimensions. w1 x1 x2 8 7 6 5 4 3 2 1 +v s ?v s 0.054 (1.37) 0.054 (1.37) figure 2 . metallization photograph esd caution
ad834 data sheet rev. f | page 6 of 20 pin configuration an d function d escriptions 00894-002 y1 1 y2 2 ?v s 3 w2 4 x2 8 x1 7 +v s 6 w1 5 ad834 t op view (not to scale) figure 3 . pin configuration table 4 . pin function descriptions pin no. mnemonic description 1 y1 positive y input 2 y2 negative y input 3 ?v s negative power supply 4 w2 open - collector outpu t 5 w1 open - collector output 6 +v s positive power supply. 7 x1 positive x input 8 x2 negative x input
data sheet ad834 rev. f | page 7 of 20 typi cal performance char acteristics 00894-004 1000 1 800 600 400 200 100 80 60 40 20 10 10 100 1000 frequenc y (mhz) mean-square output vo lt age (mv) figure 4 . mean - square output vs. frequency 00894-005 frequenc y (mhz) ac feedthrough (db) 0 1 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 10 100 1000 x feedthrough y feedthrough figure 5 . ac feedthrough vs. frequency 00894-006 frequenc y (hz) t ot al harmonic dis t ortion (dbc) 0 1m ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 10m 100m 1g x harmonic dis t ortion y harmonic dis t ortion figure 6 . total harmonic distortion vs. frequency
ad834 data sheet rev. f | page 8 of 20 test circuits 00894-007 a b subtract ch1 ? ch2 1024 point fft lo w -p ass fi l ter hp3362 a signa l gener a t or w a vetek 2500 a signa l gener a t or dat a precision 8200 volt age calibr a t or ad834 x w1 y w2 a/b switch hp54121 a sampling heads ch1 ch2 hp54120 a digitizing mainframe hp330 computer figure 7 . test configuration for measuring ac feedthrough and total harmonic distortion 00894-008 denotes a short direct connection t o the ground plane c3 560pf r1 49.9? r2 49.9? c5 0.1f c4 560pf c6 0.1f c2 0.1f x2 8 7 6 5 1 2 3 4 x1 +v s w1 y1 y2 ?v s w2 ad834 t o hp3456 a dvm +5v ?5v c1 0.1f r4 75? r3 10? l1 1h sma from hp8656 a signa l gener a t or sma t o hp436 a power meter figure 8 . bandwidth test circuit
data sheet ad834 rev. f | page 9 of 20 00894-009 8 7 6 5 1 2 3 4 x2 x1 +v s w1 notes 1. r1, r2 should be precision type resis t or (0.1%). 2. absolute v alue errors of r1, r2 cause a smal l f ac t or error. 3. r1, r2 mism a tches are expressed as linearit y errors. 4. v out = i w1 r1 ? u w2 r2 (if r1 = r2, v out = >i w r1). y1 y2 ?v s w2 ad834 ?15v +15v ad707 0.1f 0.1f 0.1f 0.1f 0.1f 0.1f ?15v +15v ad707 + +5v ?5v ? v out x y i w1 1k? 1k? 1k? 1k? a1 a2 i w2 figure 9 . low frequency test circuit 00894-109 figure 10 . example layout for soic
ad834 data sheet rev. f | page 10 of 20 explanation of typic al performance characteristics and test circuits figure 4 is a plot of the mean - square output vs. frequency for the test circuit of figure 8 . note that the rising response is due to package resonances. for frequencies above 1 mhz , ac feedthrough is dominated by static nonlinearities in the transfer function and the finite offset voltages. the offset voltages cause a small fraction of the funda - mental to appear at the output, and can be nulled out (see figure 5 ). thd data represented in figure 6 is dominated by the second harmonic, and is generated with 0 dbm input on the ac input and 1 v on the dc input. for a given amplitude on the ac input, thd is relatively insensitive to changes in the dc input ampli - tude. varying the ac input amplitude while maintaining a constant dc input amplitude affects thd performance. the squarer configuration shown in figure 8 is used to deter mine wideband performance because it eliminates the need for (and the response uncertainties of) a wideband measurement device at the output. the wideband output of a squarer configuration is a fluctuating current at twice the input frequency with a mean value proportional to the square of the input amplitude. by placing the capacitors , c3/c5 and c4/c6, across the load resistors, r1 and r2, a simple low - pass filter is formed, and the mean - square value is extracted. the mean - square response can be measured using a dvm connected across r1 and r2. care should be taken when laying out the board. when using the dip package, mount t he ic socket on a ground plane with a clear area in the rectangle formed by the pins. this is important because signific ant transformer action can arise if the pins pass through individual holes in the board; improperly constructed test jigs have c ause d oscillation at 1.3 ghz.
data sheet ad834 rev. f | page 11 of 20 theory of operation figure 11 is a functional equival ent of the ad834. there are three differential signal interfaces: the two voltage inputs ( x = x1 ? x2 and y = y1 ? y2 ) , and the current output ( w ) which flows in the direction shown in figure 11 when x and y are positive. the outputs ( w1 and w2 ) each have a standing current of typically 8.5 ma. 00894-010 x-dis t ortion cancell a tion ad834 mul tiplier core current amplifier (w) 4ma fs x2 x1 +v s w1 y1 v -i v -i y2 ?v s w2 8.5m a 8.5m a 8 7 5 6 1 2 3 4 y -dis t ortion cancell a tion figure 11 . functional block diagram the input voltages are first converted to differential currents that drive the translinear core. the equivalent resistance of the voltage - to - current (v - i) converters is about 285 , which results in low input related noise and drift. however, the low full - scale input voltage results in relatively high nonlinearity in the v - i converters. this is significantly reduced by the use of distortion cancellation circuits, which ope rate by kelvin sensing the voltages generated in the core an important feature of the ad834. the current mode output of the core is amplified by a special cascode stage that provides a current gain of nomina lly 1.6, tr immed during manufactur ing to set up the full - scale output current of 4 ma. this output appears at a pair of open collec - tors that must be supplied with a voltage slightly above the voltage on pin 6. as shown in figure 12, this can be arranged by inserting a resistor in series with the supply to pin 6 and taking the load resistors to the full supply. with r3 = 60 , the voltage drop across i t is about 600 mv. using two 50 ? load resistors, the full - scale differential output voltage is 400 mv. for best performance, the voltage on the output open - collectors ( pin 4 and pin 5) must be higher than the voltage o n pin 6 by about 200 mv , as shown in figure 12. the full bandwidth potential of the ad834 can be realized only when very careful attention is paid to grounding and decoupling. the device must be mounted close to a high quality gr ound plane and all lead lengths must be extremely short, in keeping with uhf circuit layout practice. in fact, the ad834 shows useful response to well beyond 1 ghz, and the actual upper frequency in a typical application is usually determined by the care w ith which the layout is a ffected. note that r4 (in series with the ?v s sup ply) carries about 30 ma and thus introduces a voltage drop of about 150 mv. it is made large enough to reduce the q of the resonant circuit formed by the supply lead and the decoupl ing capacitor. slightly larger values can be used, particu - larly when using higher supply voltages. alternatively, lossy rf chokes or ferrite beads on the supply leads may be used. for best performance, use termination resistors at the inputs, as shown in figure 12 . note that although the resistive component of the input impedance is quite high (about 25 k ), the input bias current of typically 45 a can generate significant offset voltages if not compensated. for example, with a source and termination resistance of 50 (net source of 25 ) the offset is 25 45 a = 1.125 m v. t he offset can be almost f ully cancelled by including (in this example) another 25 resis tor i n series with the unused input. (i n figure 12 , a 25 resis tor would be added from x1 to gnd and y2 to gnd .) to minimize crosstalk, ground the input pins closest to the output (x1 and y2); the effect is merely to reverse the phase of the x input and thus alter the polarity of the output. 00894-0 1 1 8 7 6 5 1 2 3 4 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 x-input 1v fs y -input 1v fs termination resistor termination resistor r3 62? r4 4.7? +5v ?5v w output 400mv fs r1 49.9? r1 49.9? 1f ceramic 1f ceramic figure 12 . basic connections for wideband operation transfer function the output curre nt w is the li near product of input voltages ( x and y ) divided by (1 v) 2 and mult iplied by the scaling current of 4 ma: ma 4 v 1 2 xy w with the understanding that the inputs are specified i n volts , the following si mplified expression can be used: w = (xy) 4 ma a lternatively, the full transfer function can be written as 250 1 v 1 u xy w when both inputs are driven to their clipping level of about 1.3 v, the peak output current is roughly doubled to 8 ma, but distortion levels become very high.
ad834 data sheet rev. f | page 12 of 20 biasing th e output the ad834 has two open collector outputs as shown in figure 13. the +v s pin, p in 6, is tied to the base of the output npn transistors. the following general guideline s maximize performance of the ad834. +v s +v s m ultiplier core ? v s w1 w2 +5v +5v +5v r w 49.9 r w 49.9 r cc 75 bias ?5v o utput of ad834 ad834 5 4 6 00894- 1 13 figure 13 . output stage block diagram 12.5m a r w w collec t or headroom ? + w base r cc +5v +5v +v s neg a tive output votlage swing situ a tion 1 i pos supp l y 8.0m a t o 14m a (general l y 10.5ma) 00894- 1 14 figure 14 . negative swing figure 14 shows the currents at the input when the ad834 swings negative. generally, +v s should be biased a t + 4 v or higher. for best performance , use resistor values that do not saturate the output transistors. allowing for adequate transistor headroom reduces distortion. headroom = voltage at w collector ? voltage at w base when either output swings negative, the maximum current flows through the rw resistors. it is in this situation that headroom is at a minimum. headroom negative swing = (i pos supply r cc ) ? (12.5 ma rw ) try to keep headroom at or abo ve 200 mv to maintain adequate range . headroom 200 m v. this recommendation addresses th e positive swing of the output a s shown in figure 15. it is sometimes difficult to meet this for negative output swing . 4.5m a r w w collec t or headroom ? + w base r cc +5v +5v +v s positive output votlage swing i pos supp l y 8.0m a t o 14m a (general l y 10.5ma) 00894- 1 15 situ a tion 2 figure 15 . pos itive output swing the current through rw is smaller for positive output swings . headroom positive swing = ( i pos supply r cc ) ? (4 .5 ma rw ) for dc applications or applications where distortion is not a concern, the headroom may be ze ro or as low as ? 200 m v. however, for most cases, size the resistors to give the output adequate headroom. transformer coupling in many high frequency applications where baseband operation is not required at either inputs or the output, transformer coupli ng can be used. figure 16 shows the use of a center - tapped output transformer, which provides the necessary dc load condition at the outputs , w1 and w2 , and is designed to match into the desired load impedance by appropriate choi ce of turns ratio. the specific choice of the transformer design depend s entirely on the application. transformers can also be used at the inputs. center - tapped transformers can reduce high frequency distortion and lower hf feedthrough by driving the input s with balanced signals. 00894-012 8 7 6 5 1 2 3 4 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 x-input 1v fs y -input 1v fs termination resistor termination resistor 49.9? +5v 4.7? ?5v load 1f ceramic 1f ceramic figure 16 . transformer - coupled output a particularly effective type of transformer is the balun 1 , which is a short lengt h of transmission line wound on to a toroidal ferrite core. figure 17 shows this arrangement used to convert the bal(anced) output to an un(balanced) one ( therefore, the use of the term). although the symbol used is identical to that for a transformer, the mode of operation is quite different. f irs t , the load should now be equal to the characteris t ic impedance of the line (although this is usually not critical for short line lengths). the collector load resistors , r w , can also be chosen to reverse - terminate the line, but again this is only necessary when an electrically long line is used. in most cases, r w is made as large as the dc conditions allow to minimize power loss to the load. th e line can be a miniature coaxial cable or a twisted pair. 1 for a good treatment of baluns, see transmission line transformers by jerry sevick; american radio relay league publication.
data sheet ad834 rev. f | page 13 of 20 00894-013 8765 1234 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 x -input 1v fs y -input 1v fs termination resistor termination resistor +5 v r w r w 1.5r w r l 4.7 ? ?5v 1f ceramic 1f ceramic co u t p u t balun see text c figure 17. using a balun at the output note that the upper bandwidth limit of the balun is determined only by the quality of the transmission line; therefore, the upper bandwidth of the balun usually exceeds that of the multiplier. this is unlike a conventional transformer where the signal is conveyed as a flux in a magnetic core and is limited by core losses and leakage inductance. the lower limit on bandwidth is determined by the series inductance of the line, taken as a whole, and the load resistance (if the blocking capacitors, c, are sufficiently large). in practice, a balun can provide excellent differential-to-single-sided conversion over much wider bandwidths than a transformer. wideband multipli er connections when operation down to dc and a ground based output are necessary, the configuration shown in figure 18 can be used. the element values were chosen in this example to result in a full-scale output of 1 v at the load, so the overall multiplier transfer function is w = (x1 ? x2)(y1 ? y2) where the x1, x2 , y1 , y2 inputs and w output are in volts. the polarity of the output can be reversed simply by reversing either the x or y input. 00894-014 876 5 123 4 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 49.9 ? 0.1f 0.1f +5v 4.7 ? ?5v 49.9 ? x 1v y 1v 3 . 0 1 k ? 49.9 ? 49.9 ? 167 ? 0.01f 0.01f 3.01k ? 261? 261? 3.74k ? 3.74k ? 1f 1f 2.7 ? 2.7 ? 90.9 ? load 49.9 ? 49.9 ? 7 3 1 0 1 8 14 op amp figure 18. sideband dc-coupled multiplier choose the op amp to support the desired output bandwidth. the op amp originally used in figure 18 was the ad5539, providing an overall system bandwidth of 100 mhz. the ad8009 should provide similar performance. many other choices are possible where lower post multiplication band- widths are acceptable. the level shifting network places the input nodes of the op amp to within a few hundred millivolts of ground using the recommended balanced supplies. the output offset can be nulled by includ ing a 100 trim pot between each of the lower pair of resistors (3.74 k) and the negative supply. the pulse response for this circuit is shown in figure 19; the x input is a pulse of 0 v to 1 v and the y input is 1 v dc. the transition times at the output are about 4 ns. 00894-015 10 0% 100 90 10ns 200mv figure 19. pulse response for the circuit of figure 18
ad834 data sheet rev. f | page 14 of 20 p ower measurement ( mean - s quare and rms) the ad834 is well - suited to measurement of average pow er in high frequency applications, connected either as a multiplier for the determination of the v i product , or as a squarer for use with a single input. in these applications, the multiplier is followed by a low - pass filter to extract the long - term ave rage value. where the bandwidth extends to several hundred megahertz, the first pole of this filter should be formed by grounded capacitors placed directly at the output pins , w1 and w2. this pole can be at a few kilohertz. the effective multiplication or squaring bandwidth is then limited solely by the ad8 34, because the ac tive circuitry that follows the multiplier is required to process only low frequency signals . using the device as a squarer, like the circuit shown in figure 8 , the wideband output in response to a sinusoidal stimulus is a raised cosine. sin 2 t = (1 ? cos 2 t )/2 recall tha t the full - scale output current (when full - scale input voltages of 1 v are applied to both x and y) is 4 ma. in a 50 system, a sinusoid po wer of + 10 dbm has a peak value of 1 v. thus, at this drive level , the peak output voltage across the differential 50 load in the absence of the filter capacitors is 400 mv (that is, 4 ma 50 2), whereas the average value of the raised cosine is onl y 2 00 mv. the averaging configuration is useful in evaluating the bandwidth of the ad834, because a dc voltage is easier to measure than a wideband differential output. in fact, the squaring mode is an even more critical test than the direct measurement of the bandwidth of either channel taken independently (with a dc input on the nonsignal channel), because the phase relationship between the two channels also affects the average output. for example, a time delay difference of only 250 ps between the x and y channels result s in zero output when the input frequency is 1 ghz, at which frequency the phase angle is 90 degrees and the intrinsic product is now between a sine and cosine function, which has zero average value. the physical construction of the circui try around the ic is critical to realizing the bandwidth potential of the device. the input is supplied from an hp 8656a signal generator (100 khz to 990 mhz) via an sma connector and terminated by an hp 436a power meter using an hp 8482a s ensor head conne cted via a second sma connector. because neither the generator nor the sensor provide a dc path to ground, a lossy 1 h inductor , l1, formed by a 22 - gauge wire passing through a ferrite bead (fair - rite type 2743001112) is included. this provides adequate impedance down to about 30 mhz. the ic socket is mounted on a ground plane with a clear area in the rectangle formed by the pins. this is important because significant transformer action can arise if the pins pass through individual holes in the board; it can cause an oscillation at 1.3 ghz in improperly constructed test jigs. the filter capaci tors must be connected directly to the same point on the ground plane via the shortest possible leads. parallel combinations of large and small capacitors are used to minimize the impedance over the full frequency range. refer to figure 4 for mean - s quare response for the ad834 in a cerdip package, using the configuration of figure 8 . to provide a square root response and thus generate the rms value at the output, a second ad834, also connected as a squarer, can be used , as shown in figure 20 . note t hat an attenuator is inserted both in the signal input and in the feed - back path to the second ad834. this increases th e maximum input capability to + 15 dbm and improves the response flatness by damping some of the resonances. the overall gain is unity; that is, the output voltage is exactly equal to the rms value of the input signal. the offset pot entiometer at the ad834 outputs extends the dynamic range and is adjusted for a dc output of 125.7 mv when a 1 mhz sinu soidal input at ?5 dbm is a pplied. additional filtering is provided; the time constants were chosen to allow operation down to frequencies as low as 1 khz and to provide a critically damp ed envelope response, which settles typically within 10 ms for a full - scale input (an d proportionally slower for smaller inputs). the 5 f and 0.1 f capacitors can be scaled down to reduce response time if accurate rms opera - tion at low frequencies is not required. the output op amp mus t be specified to accept a common - mode input near its supply. note that the output polarity can be inverted by replacing the npn transistor with a pnp type.
data sheet ad834 rev. f | page 15 of 20 00894-016 15k? 10k? 47.5k? 8 7 6 5 2 3 4 1 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 8 7 6 5 1 2 3 4 x2 x1 w1 y1 y2 w2 ad834 24.91? 49.9k? 80? 10? 49.9k? 80? 10? 49.9? 49.9? 49.9? 49.9? input 24.9? 1f 1f 5f 0.1f 0.1f 5f 100? 100? 75? 15k? +5v ?5v 2n3904 output 10? +v s ?v s 7 4 5 2 3 ? + ada4000-1 figure 20 . connections for wideband rms measuremen t
ad834 data sheet rev. f | page 16 of 20 frequency doubler figure 21 shows another squaring application. in this case, the output filter has been removed and the wideband differential output is converted to a single - sided signal using a balun, which consists of a length of 50 coax ial cable fed through a ferrite core (fair - rite type 26 77006301) . no attempt is made to reverse terminate the output. higher load power can be achieved by replacing the 50 load resistors with ferrite bead inductors. the same precautions should be observed with regard to printed circuit board ( pc b) layout as recommended in the power measurement ( mean - square and rms) section . the output spectrum shown in figure 22 is for an input power of + 10 dbm at a frequency of 200 mhz. the second harmonic component at 400 mhz has an output power of ?15 dbm. some feedthrough of the fundamental occurs ; it is 15 db below the main output. a spurious output at 600 mhz is also present, but it is 30 db below the main output. at an input frequency of 100 mhz, the measured power level at 200 mhz is ?16 dbm, while the fundamental feedthrough is reduced to 25 db below the main output; at an output of 600 mhz the power is ?11 dbm and the third harmonic at 900 mhz is 32 db below the main output. 00894-017 sma from hp8656 a gener a t or sma t o hp8656 a spectrum ana l yzer 8 7 6 5 1 2 3 4 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 0.1f 0.1f 0.1f 0.1f 75? 560pf 560pf balun +5v 10? 49.9? 49.9? ?5v 25? 125? 125? 25? figure 21 . frequency doubler connection s 00894-018 frequenc y (mhz) output power (dbm) ?10 150 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 0 200 250 300 350 400 450 500 550 600 650 figure 22 . output spectrum for configuration of figure 21 wideband three - signal multiplier/di vider two ad834 devices and a wideband op amp can be connected t o make a versatile multiplier/divider having the transfer function z u2 u1 y2 y1 x2 x1 w with a denominator range of about 100:1. the denominator inp ut u = u1 ? u2 must be positive and in the range 100 mv to 10 v; x, y, and z inputs may have either pola rity. figure 23 shows a general configuration that may be simplified to suit a particular application. this circuit accepts full - scale input voltages of 10 v, and delivers a full - scale output voltage of 10 v. the optional offset t rim at the output of the ad8 34 improves the accuracy for small denominator values. it is adjusted by nulling the output voltage when the x and y inputs are zero and u = 100 mv. the op am p is internally compensated to be stable without the use of any additi onal hf compensation. as input u is reduced, the bandwidth falls because the feedback around the op amp is proportional to input u. note that, this circuit was originally characterized using the ad840 op amp; some alternative op amps include the ad818 and the ad8021. this circuit can be modified in several ways. for example, if the differential input feature is not needed, the unused input can be connected to ground through a single resistor, equal to the parallel sum of the resistors in the attenuator sect ion. the full - scale input levels on x, y, and u can be adapted to any full - scale voltage do wn to 1 v by alte ring the attenuator ratios. note, however, that precautions must be taken if the attenuator ratio from the output of a3 back to the second ad834 (a 2) is lowered. first, the hf compensation limit of the op amp may be exceeded if the negative feedback factor is too high. second, if the atte nuated output at the ad834 exceeds its clipping level of 1.3 v, fee dback control is lost and the output suddenly jump s to the supply rails. however, with these limitations understood, it is possible to adapt the circuit to smaller full - scale inputs and/or outputs, for use with lower supply voltages.
data sheet ad834 rev. f | page 17 of 20 00894-019 0.1f 0.1f 0.1f 0.1f 0.1f 0.1f 75? 8 7 6 5 1 2 3 4 x2 x1 +v s w1 y1 y2 ?v s w2 ad834 100? 100? 909? 909? 909? 100? 100? 909? x2 x1 w1 y1 y2 w2 100? 100? 909? 909? 909? 100? 100? 909? 100? 100? 20k? 10k? op am p (a3) 1 1 5 4 10 4.7? 4.7? 7.5v 7.5v ?15v +15v w 10v x1 x2 y1 y2 u1 u2 z +v s ?v s 6 8 7 6 5 1 2 3 4 ad834 figure 23 . wideband three - signal multip lier/divider
ad834 data sheet rev. f | page 18 of 20 outline dimensions compliant t o jedec s t andards ms-001 controlling dimensions are in inches; millimeter dimensions (in p arentheses) are rounded-off inch equi v alents for reference on l y and are not appropri a te for use in design. corner leads m a y be configured as whole or half leads. 070606- a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) sea ting plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0. 1 15 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7. 1 1) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0. 1 15 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 24 . 8 - lead plastic dual in - line package [p dip ] narrow body (n - 8) dimensions shown in inches and (m illi m eters) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 1 4 5 8 figure 25 . 8 - lead ceramic dual in - line package [ cerdip ] (q - 8) dimensions shown in inches and (m illimeters ) controlli ng dimens ions are in millimeters; inch dimensions (in p arentheses) are rounded-o ff milli meter equiv alents for refer ence onl y and are not appropria te for use in desi gn. complian t t o jedec st andards ms-012-aa 012407 -a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196 ) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) sea ting plane 0.25 (0.0098) 0.10 (0.0040) 4 1 8 5 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.149 7) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.22 84) 0.51 (0.0201) 0.31 (0.0122) coplanari ty 0.10 figure 26 . 8 - lead standard small outline package [ soic _n ] narrow body (r - 8) dimensions sh own in millimeters and (inches)
data sheet ad834 rev. f | page 19 of 20 ordering guide model 1 temperature range pac kage description package option ad834jnz 0c to 70c 8- lead pdip n -8 ad834jrz 0c to 70c 8 - lead soic_n r - 8 ad834jrz -rl 0c to 70c 8- lead soic_n r -8 ad834jrz -r7 0c to 70c 8- lead soic_n r -8 ad834ar - reel ?40c to +85c 8- lead soic_n r -8 ad834ar - reel7 ?40c to +85c 8- lead soic_n r -8 ad834arz ?40c to +85c 8- lead soic_n r -8 ad834arz -rl ?40c to +85c 8- lead soic_n r -8 ad834arz -r7 ?40c to +85c 8- lead soic_n r -8 ad834aq ?40c to +85c 8- lead cerdip q -8 ad834sq/883b ?55c to +125c 8-l ead cerdip q -8 1 z = rohs compliant part.
ad834 data sheet rev. f | page 20 of 20 notes ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d00 894 - 0- 6/12(f)

▲Up To Search▲

Price & Availability of AD834AR-REEL

	To Download AD834AR-REEL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .